RESUME / CURRICULUM VITAE
[PRINT / SAVE PDF]Prashant Bagri
RTL Design Engineer & MTech Student (IIIT Delhi)
RTL Design Engineer and MTech student at IIIT Delhi specializing in Electronics and Communication Technology. Focus on RTL design, design verification, embedded systems, and neuromorphic computing.
EMAIL: prashantbagri05@gmail.com
LOCATION: New Delhi, India
[EDUCATION]
Indraprastha Institute of Information Technology Delhi (IIIT Delhi)
2025 – Present
M.Tech in Electronics and Communication Technology
SCORE / MARKS: CGPA 6.63 (till 2nd semester)
Bharati Vidyapeeth's College of Engineering, New Delhi
2020 – 2024
B.Tech in Electronics and Communication Engineering
SCORE / MARKS: 81.2%
[TECHNICAL SKILLS]
EXPERTISE:RTL DesignRTL to GDS FlowEmbedded SystemsFPGA Acceleration
LANGUAGES:VerilogTCLCC++Python
TOOLS & PLATFORMS:Cadence VirtuosoEldoXilinx Vivado DesignVivado HLSOpenSTAIcarus VerilogVerilatorYosys
ELECTIVES & COURSEWORK:Digital VLSI DesignVLSI Design FlowAnalog CMOS DesignAdvanced Embedded Logic DesignAdvanced Solid State Devices